Research on quantum computers using superconducting qubits is actively being pursued. Among these, topological quantum computers, which utilize the wave function changes accompanying the braiding operations of Anyons in two-dimensional electron gas, are expected to be highly robust to thermal noise and to enable the realization of large-scale quantum computers with the addition of small-scale quantum error correction circuits.
By using the surface states of three-dimensional topological insulators (3D-TI) that do not require the application of strong magnetic fields for realizing two-dimensional electron gas phase, coexistence with superconducting digital circuits such as single flux quantum (SFQ) logic circuits can be achieved, allowing the classical computing components to be placed in a cryogenic environment.
By depositing superconductors like Nb on the surface of a 3D-TI and realizing a topological superconducting state through the proximity effect, a topological Josephson junction array (TPJJ) can be created. As an Anyon, a Majorana bound state (MBS) bound to a 2-vortex placed in the junction array is used. Previously, it was demonstrated through simulation that braiding operations and CNOT operations of 2-vortices driven by a bipolar current pulse source (BCP) driven by SFQ pulses are possible [1]. In the next phase, an initialization circuit is needed to perform the initial placement of 2-vortices in the topological junction array.
This study reports the results of an investigation into an initialization circuit for the initial placement of 2-vortices using a current application method that combines two bipolar current pulse sources.
[1] H. Myoren et al., IEEE Trans. Appl. Supercond.,Vol. 34, No. 3, ArtNo. 1701306, 2024.
This work was supported by JSPS KAKENHI Grant Number 21K18708. This study has been partially supported by the VLSI Design and Education Center (VDEC) at the University of Tokyo, in collaboration with Cadence Design Systems, Inc. Circuits were fabricated in the clean room for analog-digital superconductivity (CRAVITY) of the National Institute of Advanced Industrial Science and Technology (AIST) with the high-speed standard process (HSTP). The AIST-STP2 process and AIST-HSTP process are based on the Nb circuit fabrication process developed by the International Superconductivity Technology Center (ISTEC).
Keywords: Braiding operations, Topological quantum computer, Majorana bound state, SFQ logic, bipolar current pulse generator.