Qubit I
Quantum error correction is a critical technique for transitioning from noisy intermediate-scale quantum devices to fully fledged quantum computers. The surface code, which has a high threshold error rate, is the leading quantum error correction code for two-dimensional grid architecture. So far, the repeated error correction capability of the surface code has not been realized experimentally. Here, we experimentally implement an error-correcting surface code, the distance-three surface code which consists of 17 qubits, on the Zuchongzhi 2.1 superconducting quantum processor. By executing several consecutive error correction cycles, the logical error can be significantly reduced after applying corrections, achieving the repeated error correction of surface code for the first time. This experiment represents a fully functional instance of an error-correcting surface code, providing a key step on the path towards scalable fault-tolerant quantum computing.
[1] F. Arute, K. Arya, R. Babbush, D. Bacon, J. C. Bardin, R. Barends, R. Biswas, S. Boixo, F. G. Brandao, D. A. Buell et al., Nature (London) 574, 505 (2019).
[2] Y. Wu, W.-S. Bao, S. Cao, F. Chen, M.-C. Chen, X. Chen, T.-H. Chung, H. Deng, Y. Du, D. Fan et al., Phys. Rev. Lett. 127, 180501 (2021).
[3] Y. Ye, S. Cao, Y. Wu, X. Chen, Q. Zhu, S. Li, F. Chen, M. Gong, C. Zha, H.-L. Huang, Y. Zhao, S. Wang, S. Guo, H. Qian, F. Liang, J. Lin, Y. Xu, C. Guo, L. Sun, N. Li, H. Deng, X. Zhu, and J.-W. Pan, Chin. Phys. Lett. 38, 100301 (2021).
The authors thank the USTC Center for Micro- and Nanoscale Research and Fabrication for supporting the sample fabrication. The authors also thank QuantumCTek Co., Ltd., for supporting the fabrication and the maintenance of room-temperature electronics. This research was supported by the National Key R&D Program of China, Grant No. 2017YFA0304300, the Chinese Academy of Sciences, Anhui Initiative in Quantum Information Technologies, Technology Committee of Shanghai Municipality, National Science Foundation of China (Grants No. 11905217, No. 11774326), Natural Science Foundation of Shanghai (Grant No. 19ZR1462700), and Key-Area Research and Development Program of Guangdong Provice (Grant No. 2020B0303030001).
Figure 1. Layout and circuit implementation. (a) Structure schematic of distance-three surface code. 17 qubits are choosen from Zuchongzhi 2.1 superconducting quantum processor, with 8 data qubits (gray dots), 4Z-type ancilla qubits (green dots), and 4X-type ancilla qubits (red dots). Each pair of qubits is connected with a coupler (black rectangle). Connecting lines are colored according to their involvement in two-qubit gate layers as shown in (b). (b) Circuit for one error correction cycle. Dots on the left are in one-to-one correspondence to those in (a).
Figure 2. Error detection correlation. (a) Correlation matrix for logical |0L> state. The finer scale is used for the marking of ancilla qubits and each block has a definite cycle index. Color scheme is presented in the side color bar with the dark side for low correlation and yellowish side for strong correlation. (b) Correlation matrix for logical |-L> state.
Figure 5. Fidelity of logical state with error detection and/or error correction. (a) Fidelity of the postselected logical |0L> state by error detection as function of clock cycles, i.e., the portion of samples that retain the logical state through some clock cycles. Various lines correspond to different postselection schemes. The dotted line depicts the prediction based on relaxation time T1 of the best physical qubit among all used physical qubits. Logical error rates ϵL are extracted from the curve and logical fidelities TL are calculated. These values are listed by each line. Inset describes the retained rate for the three postprocessing schemes as a function of rounds. (b) Results for the postselected logical |-L> state by error detection. (c) Fidelity of logical |0L> state with the number of surface code cycles with error correction (blue line with square) or without (red line with triangular). (d) Same quantity for the logical |-L> state after error correction
Keywords: Quantum Error Correction, Superconducting Quantum Computing, Surface Code
Quantum computers based on several different hardware technologies have been proposed and demonstrated recently. The number of qubits for such computers now exceeds one hundred. However, practical applications of quantum computers are yet to be realized. One of the reasons for this is the existence of relatively large errors in qubit operations and readout. Another reason is that the number of qubits is insufficient for implementing large-scale quantum error correction and realizing fault-tolerant quantum computation (FTQC). In addition to hardware issues, efforts in software technology, for instance, to reduce the number of qubits required for FTQC are also important.
Fujitsu has been working on high-performance computing technologies for years. We are actively pursuing quantum computing to address societal challenges intractable for conventional computers. We are committed to research and development (R&D) across all layers of quantum computing, from quantum devices to algorithms and applications. Our R&D efforts are conducted in collaboration with world-leading research institutions, including RIKEN, Delft University of Technology (TU Delft), and Osaka University.
In hardware technologies, Fujitsu focuses on two qubit technologies: superconducting qubit technology developed with RIKEN and diamond-spin qubit technology with TU Delft. In October 2023, we launched a 64-qubit superconducting quantum computer at RIKEN RQC-Fujitsu Collaboration Center [1]. We are now developing 256- and 1000-qubit superconducting quantum computers, which will be released in the near future. In the presentation, our efforts to improve the uniformity in qubit characteristics [2] and the performance of our quantum computers will be briefly discussed.
We also work on diamond-spin qubit technology with TU Delft [3]. We use an electron spin formed at tin-vacancy (SnV) in diamond as a qubit [4]. Nuclear spins of 13C in the vicinity of SnV are also used as qubits. In this technology, since SnV qubits can be entangled with each other using photonic interconnect, there is freedom in the topology of qubit connections. So it may be possible to implement a new quantum error correction code for our diamond spin qubits, possibly reducing the overhead for error correction in the future.
Our collaboration with Osaka University focuses on software for fault-tolerant quantum computing (FTQC), including technologies for error correction [5, 6] and logical gate operations. We have recently proposed a novel quantum computing architecture that incorporates error correction [7]. This "partially" fault quantum computing approach aims to significantly reduce the number of qubits and gate operations required for practical quantum computing.
Furthermore, we are dedicated to developing practical quantum computer applications. In 2022, we launched research collaborations with end-users in the fields of materials science, drug discovery, and finance, leveraging Fujitsu's quantum computer simulator, which draws upon our expertise in high-performance computing (HPC). We now provide end-users with a hybrid quantum computing platform consisting of our 64-qubit quantum computer and 40-qubit quantum computer simulator for application development. In fact, we developed and demonstrated a hybrid algorithm both using a quantum computer and a simulator for quantum chemistry calculations [8].
This presentation will provide a concise overview of Fujitsu's comprehensive quantum computing research activities, including collaborative efforts at the RIKEN RQC-Fujitsu Collaboration Center.
[1]https://www.fujitsu.com/global/about/resources/news/press-releases/2023/1005-01.htm
[2] T. Takahashi, et. al., Jpn. J. Appl. Phys. 62, SC1002 (2023).
[3] R. Ishihara et al., IEDM2021, doi: 10.1109/IEDM19574.2021.9720552.
[4] M. Pasini et al., Phys. Rev. Lett. 133, 023603 (2024).
[5] J. Fujisaki, et al., Phys. Rev. Research 4, 043086 (2022).
[6] J. Fujisaki, et al., Phys. Rev. Research 5, 043261 (2023).
[7] Y. Akashoshi, et al., PRX Quantum 5, 010337 (2024).
[8] N. Iijima, et al., arXiv:2311.09634 (2023).
Keywords: Quantum computer, Superconducting qubit, Diamond spin qubit, Error correction
In the development of quantum computers using superconducting qubits, fixed-frequency transmon qubits offer advantages for integration because they do not require a magnetic field and have excellent coherence properties. However, a limitation of these qubits is their inability to change frequency during gate operations, leading to potential frequency collisions caused by parameter fluctuations during fabrication. To fully leverage the advantages of fixed-frequency transmon qubits, it is essential to develop a scalable two-qubit gate scheme that is robust against qubit frequency variations. In this study, we experimentally demonstrated a two-qubit gate that addresses these challenges using a fixed-frequency transmon qubit as a coupler [1]. The gate operation is based on a microwave-induced parametric transition between an auxiliary level introduced by the fixed-frequency transmon coupler and a level within the computational subspace. Additionally, we found that the residual ZZ interaction could be suppressed without additional structures by carefully designing the capacitance network that includes the coupler. In this talk, I will present the theoretical and numerical modeling of this gate scheme, discuss the experimental results, and conclude with prospects.
[1] S. Shirai, Y. Okubo, K. Matsuura, A. Osada, Y. Nakamura, and A. Noguchi, “All-microwave manipulation of superconducting qubits with a fixed-frequency transmon coupler”, Phys. Rev. Lett. 130, 260601 (2023).
This work was partly supported by JST ERATO (Grant No. JPMJER1601), MEXT Q-LEAP (Grant No. JPMXS0118068682), and JSPS KAKENHI (Grant No. JP22J15257).
Figure 1. (a) Optical image of a fabricated superconducting circuit. Most of the structures are made from TiN electrodes (yellow) on a Si substrate (gray). (b) Equivalent circuit diagram of the coupled transmon system, where readout resonators, Purcell filters, and drive lines are omitted. Only the coupling capacitors connected to them are depicted.
Keywords: Superconducting qubit, Transmon, Frequency collision, Two-qubit gate